1. Field of the Invention
This invention relates to a charge trap type nonvolatile semiconductor memory device and a method for manufacturing the same.
2. Background Art
Conventionally, a memory device including MONOS (metal-oxide-nitride-oxide-silicon) type memory cells has been developed as a nonvolatile semiconductor memory device. In a MONOS type memory cell, a control gate electrode made of a metal or the like, a charge block layer made of silicon oxide or the like, a charge storage layer made of silicon nitride, a tunnel insulating layer made of silicon oxide or the like, and a channel member made of silicon are arranged in this order (see, e.g., JP-A-2008-182035 (Kokai)). Thus, charge is supplied from the channel member through the tunnel insulating layer to the charge storage layer and stored therein to store information (data).
However, such a MONOS type memory cell has the problem of narrow memory window, that is, the variable range of the threshold voltage of the memory cell varied in response to data rewriting is narrow. This interferes with the speedup of rewriting operation and increase in memory capacity. Another problem is that data retention characteristics and data program/erase characteristics vary between memory cells. In particular, with the downscaling of memory cells, this variation in characteristics becomes unacceptable and causes malfunctions of memory cells.